Computer Architecture
Explore how computer systems work from the inside—from processors and instruction execution to memory, I/O, and modern computer architectures.
Table Of Content
- Course Information
- Current Semester — 2026–2027
- Lecture Materials
- 8086 Assembly Programming Notes
- Labs
- Tutorial
- Assignments
- Exams & Model Ans
- Sample / Practice Exams
- Previous Exams
- Textbook & References
- Primary Textbook
- 1. Computer Organization and Architecture – EIGHTH EDITION
- Supplementary References
- Computer Organization and Design
- Video Lectures
Course materials and learning resources for Computer Organization and Architecture, including lecture materials, practical activities, assignments, examinations, model answers, textbooks, references, and supplementary resources.
Course Information
| Course Information | Details |
|---|---|
| Course Title | Computer Organization and Architecture |
| Course Code | COE 224 |
| Level | Undergraduate |
| Current Semester | Current Semester — 2026–2027 |
| Academic Year | 2026–2027 |
| Instructor | Prof. Mostafa Elhosseini |
| Primary Textbook | Computer Organization and Architecture – EIGHTH EDITION William Stallings Primary reference for: computer structure, memory systems, I/O, processor organization, control units, and parallel systems. |
Current Semester — 2026–2027
Course resources for the current semester are provided below and will be updated throughout the semester as new lectures, practical activities, assignments, and assessment materials become available.
Lecture Materials
| Chapter | Topic | Slides | Handout |
|---|---|---|---|
| 1 | INTRODUCTION | Slides | |
| Chapter 2 | Part 1- A BRIEF HISTORY OF COMPUTERS | Slides | |
| Part 2 – IAS / Von Neumann | Slides | ||
| Part 3 – IAS Architecture / Register / Instruction Set / Instruction Cycle | Slides | ||
| Part 4 – Transistors / IC / Moore;s Law / Microprocessor | Slides | ||
| Part 5 – Pipelining / Buses (Address – Data – Control) | Slides | ||
| Part 6 – MP Speed / Performance Balance / | Slides | ||
| Part 7 – CISC/RISC / Embedded Systems | Slides | ||
| Part 8: Clock Speed / MIPS / MFLOPS Rate | Slides | ||
| Part 9 – PERFORMANCE | Slides | ||
| Part 10 – Solved Problem | Slides | ||
| Chapter 3: A TOP-LEVEL VIEW OF COMPUTER FUNCTION AND INTERCONNECTION | Part 1 – Instruction Cycle | Slides | |
| Part 2 – Interrupts | Slides | ||
| Part 3 – Buses | Slides | ||
| Part 4 – Bus Interconnection | Slides | ||
| Part 5 – PCI | Slides | ||
| Chapter 4: CACHE MEMORY | Part 1 – C/Cs of Memory Systems / Memory Hierarchy | Slides | |
| Part 2 – Hit Ratio | Slides | ||
| Part 3 – Cache Memory Principles | Slides | ||
| Part 4 – Elements of Cache Design | Slides | ||
| Part 5 – Mapping Function | Slides | ||
| Part 6 – Associative Mapping | Slides | ||
| Part 7 – Set Associative Mapping | Slides | ||
| Chapter 5: INTERNAL MEMORY | Part 1 – Organization | Slides | |
| Part 2 – Read/Write / Addressing Operation | Slides | ||
| Part 3 – DRAM / SRAM | Slides | ||
| Part 4 – ROM | Slides | ||
| Part 5 – Memory Expansion | Slides | ||
| Part 6 – Error Correction | Slides | ||
| Part 7 – Advanced DRAM Organization | Slides | ||
| Chapter 6: EXTERNAL MEMORY | Part 1 – Magnetic Disk / Magnetic Read and Write / Data Organization and Formatting | Slides | |
| Part 2 – Physical characteristics | Slides | ||
| Part 3 – Disk Perfromance Parameters | Slides | ||
| Part 4 – Example | Slides | ||
| Part 5 – RAID | Slides | ||
| Chapter 8: OPERATING SYSTEM SUPPORT | Part 1 – Operating System Overview | Slides | |
| Part 2 – OS Types | Slides | ||
| Part 3 – Scheduling | Slides | ||
| Part 4 – Memory Management | Slides | ||
| Part 5 – Partitioning | Slides | ||
| Part 6 – Paging | Slides | ||
| Part 7 – Paging cont. | Slides | ||
| Part 8 – Segmentation | Slides | ||
| supplementary | Data Representation | Slides | PDF |
| 8086 MP | Slides | ||
| 8086 Instruction Set | Slides | ||
| Addressing Modes | Slides | ||
| Slides | |||
| Slides |
8086 Assembly Programming Notes
Concise notes and worked examples covering 8086 assembly language fundamentals, registers, instruction formats, addressing modes, arithmetic and logic operations, branching, loops, procedures, and basic assembly programming.
| # | File / Topic | Type |
|---|---|---|
| 1 | 8086 MP – Flag Register | |
| 2 | Conditional Statements | |
| 3 | Simulate High-level Conditional Statement | |
| 4 | Machine code – Assembly Language | |
| 5 | TASM Assembler | |
| 6 | Assembly language | |
| 7 | 8086 Control / Branch / Jump Instruction | |
| 8 | Debug 01 | DOC |
| Debug 02 | DOC | |
| 9 | Dubug code 1 | |
| 10 | Dubug code 2 | |
| Dubug code 3 | ||
| Dubug code 4 | ||
| Dubug code 5 | ||
| Dubug code 6 | ||
| Dubug code 7 | ||
| Dubug code 8 | ||
| Dubug code 9 |
Labs
| Lab | Topic | Lab Sheet | Supporting Files |
|---|---|---|---|
| 1 | Worksheet | ||
| 5 | Activity | Files |
Tutorial
| # | Description | |
|---|---|---|
| 1 | Sheet 01 – Reevision | |
| 2 | Sheet 02 – Decimal codes Logic design | |
| 3 | Sheet 03 – Memory |
Assignments
| Assignment | Topic | Due Date | Download |
|---|---|---|---|
| Assignment 1 | — | ||
| Assignment 2 | — | ||
| Assignment 3 | — | ||
| Course Project | — |
Exams & Model Ans
Sample / Practice Exams
| Resource | Download |
|---|---|
| Sample Midterm Exam | |
| Sample Final Exam |
Previous Exams
| Academic Year | Assessment | Download |
|---|---|---|
| 2019 | Pre-course Review Quiz 1 | Quiz Model Ans |
| Review Quiz 2 | Quiz Model Ans | |
| Review Quiz 3 | Quiz Model Ans | |
| Review Quiz 4 | Quiz Model Ans | |
| Review Quiz 5 | Quiz Model Ans | |
| 2025–2026 | Midterm 01 | Quiz Model Ans |
| 2025–2026 | Midterm 02 | Quiz Model Ans |
| 2025–2026 | Final | Quiz Model Ans |
| March 2019 | Midetrm | Exam Model Ans |
| March 2019 | Midetrm تجسير | Exam Model Ans |
| April 2019 | Final | Exam Model Ans |
| April 2019 | Final تجسير | PDF Model Ans |
Textbook & References
Primary Textbook
1. Computer Organization and Architecture – EIGHTH EDITION
William Stallings
Primary reference for: computer structure, memory systems, I/O, processor organization, control units, and parallel systems.
Supplementary References
Computer Organization and Design
David A. Patterson & John L. Hennessy
Primary reference for: processor organization, instruction sets, datapath, memory hierarchy, and performance.

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